EFM32TG210F32 Energy Micro, EFM32TG210F32 Datasheet - Page 293

MCU 32BIT 32KB FLASH 32-QFN

EFM32TG210F32

Manufacturer Part Number
EFM32TG210F32
Description
MCU 32BIT 32KB FLASH 32-QFN
Manufacturer
Energy Micro
Series
Tiny Geckor
Datasheets

Specifications of EFM32TG210F32

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
32MHz
Connectivity
EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.8 V
Data Converters
A/D 4x12b, D/A 1x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad
Processor Series
EFM32
Core
ARM Cortex-M3
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
UART, I2C, SPI
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
17
Number Of Timers
1
Operating Supply Voltage
1.8 V to 3.8 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Processor To Be Evaluated
EFM32TG210
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
19.4 Register Map
19.5 Register Description
19.5.1 LETIMERn_CTRL - Control Register (Async Reg)
31:13
12
11
Offset
0x000
0x004
0x008
0x00C
0x010
0x014
0x018
0x01C
0x020
0x024
0x028
0x02C
0x030
0x034
0x040
Offset
0x000
Reset
Access
Name
Bit
2010-12-21 - d0034_Rev0.90
The offset register address is relative to the registers base address.
For more information about Asynchronous Registers please see Section 5.3 (p. 18) .
Reserved
DEBUGRUN
Set to keep the LETIMER running in debug mode.
RTCC1TEN
Allows the LETIMER to be started on a compare match on RTC compare channel 1.
Name
Value
0
1
Value
0
Name
LETIMERn_CTRL
LETIMERn_CMD
LETIMERn_STATUS
LETIMERn_CNT
LETIMERn_COMP0
LETIMERn_COMP1
LETIMERn_REP0
LETIMERn_REP1
LETIMERn_IF
LETIMERn_IFS
LETIMERn_IFC
LETIMERn_IEN
LETIMERn_FREEZE
LETIMERn_SYNCBUSY
LETIMERn_ROUTE
Description
LETIMER is frozen in debug mode
LETIMER is running in debug mode
Description
LETIMER is not affected by RTC compare channel 1
0
0
Reset
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
RW
RW
Access
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Bit Position
Type
RW
W1
R
RWH
RW
RW
RW
RW
R
W1
W1
RW
RW
R
RW
Debug Mode Run Enable
RTC Compare 1 Trigger Enable
Description
Description
Control Register
Command Register
Status Register
Counter Value Register
Compare Value Register 0
Compare Value Register 1
Repeat Counter Register 0
Repeat Counter Register 1
Interrupt Flag Register
Interrupt Flag Set Register
Interrupt Flag Clear Register
Interrupt Enable Register
Freeze Register
Synchronization Busy Register
I/O Routing Register
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