mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 1011

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mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
The following example shows a monochrome full VGA (640 480) passive display,
single-scan, 4-bit panel data bus. The LCD controller will provide 8-bit per pixel coding with
a refresh rate of 90Hz. In this example, assume a display memory cycle burst timing of (2,
1, 1, 1) for a total of five cycles per burst. It is recommended that the LCD controller use less
than 45% of the bus.
18.3.10.2 BUS LATENCY. The maximum bus latency allowed in the system is given by:
Typical example using the same data from above:
SCLK = 25MHz
FRR = 90Hz
MB = 5
BPIX = 8
COL = 640
ROW = 480
BNUM = (COL
Bus Band Width = (BNUM
ROW
Freescale Semiconductor, Inc.
Bus Band Width
Max Latency
For More Information On This Product,
BPIX)
MPC823 REFERENCE MANUAL
Max Latency
FRR
Go to: www.freescale.com
=
5 25
---------------------------- -
128
=
9600 90
MB)
9600 90 5
-----------------------------------
25
=
10
------------------------------------- -
BNUM FRR
6
10
MB SCLK
SCLK
=
6
145 System Clocks
100%
=
17%
LCD Controller
18-19

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