mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 251

• Manufacturer Part Number: mpc823rg
• Description: Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
• Manufacturer: Freescale Semiconductor, Inc

Memory Management Unit
V—Entry Valid
Default value on instruction TLB miss is 1.
11.6.1.11 MMU DATA TABLEWALK CONTROL REGISTER. The MMU data tablewalk
control (MD_TWC) register contains the second level pointer and access protection group
of an entry to be loaded into the translation lookaside buffer.
L2TB—Tablewalk Level 2 Base Value
These bits are the most-significant bits of the level two pointer.
Bits 20–22—Reserved
When written, these bits are reserved and must be set to 0. When read, they return
MD_EPN[10:19] when MD_CTR
APG—Access Protection Group
When written, this field supports a maximum of 16 protection groups. It is set to 0000 on the
data TLB miss. When read, it returns MD_EPN[10:19] when MD_CTR
MD_EPN[12:21] when MD_CTR
G—Guarded
When written, this bit of the entry has the following settings and is set to 0 on a data TLB
miss:
MD_TWC
NOTE: — = Undefined.
RESET
RESET
FIELD
ADDR
FIELD
ADDR
R/W
R/W
BIT
BIT
0 = Entry is not valid.
1 = Entry is valid.
0 = Unguarded storage.
1 = Guarded storage.
16
0
17
1
L2TB
R/W
—
18
2
Freescale Semiconductor, Inc.
For More Information On This Product,
19
3
20
MPC823 REFERENCE MANUAL
4
TWAM
TWAM
RESERVED
Go to: www.freescale.com
R/W
21
—
5
= 1 and MD_EPN[12:21] when MD_CTR
= 0.
22
6
23
SPR 797
SPR 797
7
L2TB
R/W
—
24
8
APG
R/W
—
25
9
10
26
R/W
11
27
—
G
TWAM
12
28
R/W
PS
—
= 1 and
13
29
TWAM
MOTOROLA
R/W
WT
14
30
—
= 0.
R/W
15
31
—
V