mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 415

• Manufacturer Part Number: mpc823rg
• Description: Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
• Manufacturer: Freescale Semiconductor, Inc

15.5.4.2.5 Loop Control. The LOOP bit in the RAM word allows you to run a repetitive
program fragment a specific number of times. The first time the LOOP bit is asserted in a
RAM word, the memory controller recognizes it as a Loop Start Word. At this time, the
memory loop counter is loaded with the corresponding contents of the LOOP field shown in
Table 15-6. See the appropriate machine mode register (MxMR) for more information. The
next RAM word encountered with the LOOP bit set is recognized as a Loop End Word. At
this time, the memory loop counter is decremented by one.
Continued loop execution depends on the memory loop counter. If the loop counter is not
zero, the next RAM word executed is the Loop Start Word. Otherwise, the next RAM word
executed is the word following the Loop End Word. Loops can be sequentially executed, but
not nested.
15.5.4.2.6 Exception Handling. When an access to a memory device is initiated by the
MPC823 under UPM control, the external device may assert the TEA, SRESET, or HRESET
signal. An exception occurs when one of these signals is asserted by an external device and
the MPC823 begins closing the memory cycle transfer. When an exception is recognized
and the EXEN bit is set in the RAM word, the next RAM word will branch to the special
exception start address (EXS). See Table 15-4 for more information. You must provide an
exception handler to handle output signals controlled by the UPM. For DRAM control, you
would provide a handler that would negate RAS and CASx to prevent data corruption. The
EXEN bit is similar to an exception mask in that if it is 0, then it defers the exception and
continues executing. If a RAM word is encountered with the EXEN bit set, the UPM performs
a branch to the exception start address. When the branch to the exception start address is
performed, the UPM continues reading until the LAST bit is set in the RAM word.
Read Single Beat Cycle
Read Burst Cycle
Write Single Beat Cycle
Write Burst Cycle
Periodic Timer Expired
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For More Information On This Product,
Table 15-6. MxMR Loop Bit Usage
MPC823 REFERENCE MANUAL
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MxMR LOOP FIELD
WLFx
WLFx
RLFx
RLFx
TLFx
Memory Controller
15-59