mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 117

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mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Clocks and Power Control
When none of these conditions exist and the CSRC bit of the PLPRCR is set, the general
system clock automatically switches back to low frequency. When the general system clock
is divided, its duty-cycle is modified. One phase remains the same while the other stretches
out. GCLKx and CLKOUT no longer have a 50% duty cycle when the division factor is
greater than 1, as shown in Figure 5-8 and Figure 5-9.
GCLK1
GCLK2
GCLK1_50
(EBDF=00)
GCLK2_50
(EBDF=00)
CLKOUT
(EBDF=00)
GCLK1_50
(EBDF=01)
GCLK2_50
(EBDF=01)
CLKOUT
(EBDF=01)
GCLK1 DIVIDED BY 1
GCLK2 DIVIDED BY 1
GCLK1 DIVIDED BY 2
GCLK2 DIVIDED BY 2
GCLK1 DIVIDED BY 4
GCLK2 DIVIDED BY 4
Figure 5-8. Divided System Clocks Timing Diagram
Figure 5-9. MPC823 Clocks For Division Factor 2
Freescale Semiconductor, Inc.
For More Information On This Product,
MPC823 REFERENCE MANUAL
Go to: www.freescale.com
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