mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 482

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mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Communication Processor Module
W—Wrap (Final Function Descriptor in Table)
I—Interrupt
OPCODE—Function Operation Code
This field specifies the function that must be executed. Some of these bits are reserved so
they can be expanded by tapping into RAM and executing a routine. See Table 16-6 for
more information.
16.3.3.2.2 DSP Parameter RAM Memory Map. Each section in the dual-port RAM is
associated with each DSP chain and can be used for parameter storage or as a scratchpad.
The FDBASE index pointer defines the place in system memory for the function descriptor
chain to start. It must be 16-byte aligned. Also, the FDBASE index pointer must be initialized
before the INIT_DSP command is issued. See Table 16-7 for DSP parameter RAM memory
map details.
0 = This is not the last function descriptor in the function descriptor table.
1 = This is the last function descriptor in the function descriptor table. After this buffer
0 = No interrupt is generated after this function is processed.
1 = A maskable interrupt is generated after this function is processed.
has been used, the communication processor module processes the first function
descriptor that the FDBASE index pointer points to in the table. The number of
function descriptors in this table is programmable and determined only by the W bit
and the overall space constraints of the memory.
Freescale Semiconductor, Inc.
For More Information On This Product,
MPC823 REFERENCE MANUAL
Go to: www.freescale.com
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