mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 44

• Manufacturer Part Number: mpc823rg
• Description: Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
• Manufacturer: Freescale Semiconductor, Inc

Number
6-1.
6-2.
6-3.
6-4.
6-5.
6-6.
6-7.
6-8.
6-9.
6-10. Other Control Registers ................................................................................. 6-19
6-11. Encoding Special Registers Located Outside the Core ................................. 6-19
6-12. Load/Store Instructions Timing ...................................................................... 6-30
6-13.
7-1.
8-1.
11-1. Number of Effective Address Bits Replaced By Real Address Bits ............... 11-8
11-2. Number of Identical Entries Required in the Level One Table ....................... 11-8
11-3. Number of Identical Entries Required in the Level Two Table ....................... 11-8
12-1. Priority of System Interface Unit Interrupt Sources ........................................ 12-6
12-2. Multiplexing Control ..................................................................................... 12-29
xlii
Table
Branch Prediction Policy .................................................................................. 6-6
Before and After Interrupts ............................................................................... 6-8
Special Ports to Machine State Register Bits ................................................ 6-11
Interrupt Latency ............................................................................................ 6-11
Instruction-Related Interrupt Detection Order ................................................ 6-14
Interrupt Priority Mapping ............................................................................... 6-15
Standard Special-Purpose Registers ............................................................. 6-16
Standard Timebase Register Mapping .......................................................... 6-16
Additional Special-Purpose Registers ............................................................ 6-17
Offset of First Instruction by Interrupt Type ...................................................... 7-8
Instruction Execution Timing ............................................................................ 8-1
Value Summary of the DAR, BAR, and DSISR Registers ............................ 6-31
LIST OF TABLES (Continued)
Freescale Semiconductor, Inc.
PowerPC Architecture Compliance
Instruction Execution Timing
Memory Management Unit
MPC823 REFERENCE MANUAL
ore Information On This Product,
System Interface Unit
Go to: www.freescale.com
PowerPC Core
Section 11
Section 12
Section 6
Section 7
Section 8
Title
MOTOROLA
Number
Page