mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 664

• Manufacturer Part Number: mpc823rg
• Description: Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
• Manufacturer: Freescale Semiconductor, Inc

Communication Processor Module
The following reception errors can be detected by the SCCx UART controller:
• Overrun Error—This error occurs when data is moved from the receiver FIFO to the
• CD Lost During Character Reception Error—If this error occurs and the channel is using
• Parity Error — When a parity error occurs, the channel writes the received character to
• Noise Error — The SCCx UART controller detects a noise error when three different
• Idle Sequence Receive Error — When the SCCx UART controller receiver receives all
data buffer after the first byte is received. If a receiver FIFO overrun occurs, the channel
writes the received character into the internal FIFO and over the previously received
character. The channel then writes the received character to the buffer, closes it, sets
the OV bit in the RX buffer descriptor, and generates the RX interrupt if it is enabled. In
automatic multidrop mode, the receiver enters hunt mode immediately.
this pin to automatically control reception, the channel terminates character reception,
closes the buffer, sets the CD bit in the RX buffer descriptor, and generates the RX
interrupt if it is enabled. This error has the highest priority. The last character in the
buffer is lost and other errors are not checked. In automatic multidrop mode, the
receiver enters the hunt mode immediately.
the buffer, closes the buffer, sets the PR bit in the RX buffer descriptor, and generates
the RX interrupt if it is enabled. The channel also increments the PAREC counter. In
automatic multidrop mode, the receiver enters hunt mode immediately.
samples are taken on every bit. When this error occurs, the channel writes the received
character to the buffer, proceeds normally, but increments the noise error.
ones in the receive buffer (idle sequence), the channel counts the number of
consecutive idle characters that were received. If the count reaches the value
programmed into MAX_IDL, the buffer is closed and an RX interrupt is generated. If no
receive buffer is open, this event does not generate an interrupt or any status
information. The internal idle counter (IDLC) is reset every time a character is received.
Note: A noise error will not occur when the SCCx UART controller is in synchronous
Note: To disable the idle sequence function, set the MAX_IDL value to zero.
mode.
Freescale Semiconductor, Inc.
For More Information On This Product,
MPC823 REFERENCE MANUAL
Go to: www.freescale.com
MOTOROLA