mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 923

• Manufacturer Part Number: mpc823rg
• Description: Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
• Manufacturer: Freescale Semiconductor, Inc

16.13.7.5 I
read/write I
generator. This register is set to all ones at hard reset.
DIV— Division Ratio 0–7
This field specifies the divide ratio of the baud rate generator divider in the I
generator. The output of the prescaler is divided by 2 x (DIV + 3 + (2 x FLT)) and the clock
has a 50% duty cycle. The FLT bit is in the I2MOD register.
16.13.7.6 I
is used to start I
STR—Start Transmit
When the I
start transmitting data from the I
is in slave mode, setting the STR bit to 1 when the I
transmit data register from the I
address byte that matches the slave address with the R/W bit set to 1. The STR bit is always
read as a zero.
I2BRG
I2COM
RESET
RESET
FIELD
ADDR
FIELD
ADDR
R/W
R/W
BIT
BIT
2
2
2
2
C controller is in master mode, setting this bit to 1 causes the I
C baud rate generator (I2BRG) register sets the divide ratio of the baud rate
C BAUD RATE GENERATOR REGISTER. The 8-bit, memory mapped,
C COMMAND REGISTER. The 8-bit read/write I
STR
R/W
0
1
0
0
Note: The minimum value for DIV is three if the digital filter is disabled (FLT=0) and six
2
C operation.
of it is enabled (FLT=1).
Freescale Semiconductor, Inc.
1
1
1
For More Information On This Product,
2
2
MPC823 REFERENCE MANUAL
C transmit buffers if they are ready. When the I
C transmit buffer and start transmitting when it receives an
2
1
2
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(IMMR & 0xFFFF0000) + 0x86C
(IMMR & 0xFFFF0000) + 0x868
3
1
3
RESERVED
R/W
R/W
DIV
0
2
C controller is idle causes it to load the
4
1
4
Communication Processor Module
2
C command (I2COM) register
5
1
5
2
6
1
6
C controller to
2
C clock
2
C controller
R/W
M/S
16-471
7
1
7
0