mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 1323

• Manufacturer Part Number: mpc823rg
• Description: Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
• Manufacturer: Freescale Semiconductor, Inc

Index
DSP programming (core and CPM),
DSP programming for core,
external bus master,
general circuit interface,
half-word working mode 1,
half-word working mode 2,
HDLC bus controller programming,
HDLC interrupt event,
hierarchical bus interface,
IDL interface.
initializing the RISC timers,
interrupt table handling,
memory system interface
memory system interface,
PCMCIA timing,
port A configuration,
port B configuration,
RISC timer interrupt handling,
SCC2 in AppleTalk mode programming,
SCC2 in Ethernet mode programming,
SCC2 in high-speed IrDA mode programming,
SCC2 in low-speed IrDA mode programming,
SCC2 in middle-speed mode programming,
SCC2 in Transparent mode programming,
SCCx HDLC receive buffer descriptor,
SCCx in ASYNC HDLC mode programming,
SCCx in Ethernet mode receive buffer
SCCx in HDLC mode address recognition,
SCCx in HDLC mode programming,
SCCx in UART mode programming,
SCCx in UART mode S-record programming,
SCCx UART interrupt event,
SCCx UART receive buffer descriptor,
serial peripheral interface master programming,
serial peripheral interface slave programming,
slow device interface,
SMC in Transparent mode programming NMSI,
SMC in Transparent mode TSA programming,
SMC in UART mode programming,
SMC in UART mode receive buffer descriptor,
16-297
16-294
295
314
283
descriptor,
235
16-253
16-229
16-450
16-451
16-420
16-421
page mode extended data-out,
page-mode DRAM,
16-337
16-146
17-22
16-479
16-486
15-72
15-67
16-248
15-76
12-11
Freescale Semiconductor, Inc.
16-150
15-67
15-76
For More Information On This Product,
20-13
20-14
16-24
16-36
16-224
16-25
MPC823 REFERENCE MANUAL
15-88
16-261
16-404
16-37
16-252
16-227
Go to: www.freescale.com
16-242
16-218
16-345
16-266
16-
16-
16-
16-
,
examples, instruction execution,
exception control cycles,
exception handling,
exception sources,
exception, causes of,
exception, detecting an,
exceptions,
exceptions, PowerPC,
execution, DSP,
exiting from low-power mode,
EXS (definition),
EXTAL,
EXTCLK,
external accesses (definition),
external bus masters,
external bus, operating at lower frequencies,
external hard reset,
external interrupt
external memory access requests,
external soft reset,
F
features
SPI with different LEN values,
timer initialization,
translation reload,
transparent synchronization,
UART baud rate,
universal serial bus initialization,
video controller programming,
latency,
baud rate generators,
big endian mode,
bus interface,
clocks and power control,
communication processor module,
core,
CPM interrupt controller,
data cache,
development capabilities,
digital signal processing,
HDLC bus controller,
I2C controller,
IDMA,
instruction cache,
LCD controller,
little endian mode,
memory controller,
memory management unit,
not supported by SMC in UART mode,
parallel I/O ports,
PCMCIA,
16-399
377
2-6
6-1
2-6
16-90
20-28
6-13
10-1
16-73
15-41
13-1
16-454
4-4
6-7
18-1
15-59
4-3
16-159
6-7
16-475
14-5
15-68
9-1
16-81
11-50
7-2
14-3
15-1
6-9
13-41
16-256
16-154
16-497
16-26
5-28
20-1
5-1
15-68
11-1
8-4
16-303
16-442
19-19
15-42
MOTOROLA
16-375
16-1
16-389
,
5-17
16-