mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 556

no-image

mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Communication Processor Module
• Single address destination write—During this type of IDMA cycle, the source device is
controlled by the IDMA handshake signals (DREQx and SDACKx). When the source
device requests service from the IDMA channel, IDMA asserts SDACKx to allow the
source device to drive data onto the data bus. The data is written to the device or
memory selected by the AT field in the DAPR, the destination AT field in the DFCR, and
the SIZE field in the DCMR. The data bus is driven to three-state for this write cycle. For
more details about IDMA handshake signals, refer to Section 16.6.2 IDMA Interface
Signals. For specific timing parameters, visit our website.
CLKOUT
ADDRESS
TS
RD /
DATA
TA
SDACKx
DREQx
WR
Figure 16-40. Single-Address, Peripheral Write, Synchronous TA
T3
Freescale Semiconductor, Inc.
T1
For More Information On This Product,
T3
MPC823 REFERENCE MANUAL
T0
Go to: www.freescale.com
T1
T2
T3
T0
T1
T3
T1
T3
T1
MOTOROLA
T3

Related parts for mpc823rg