mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 335

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mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
13.4.6.2 BUS GRANT SIGNAL. The BG signal is asserted by the arbiter to indicate that the
bus is granted to the requesting device. The BG signal can be negated after BR is negated.
The current bus master may choose to keep BG asserted to park the bus and maintain
ownership without rearbitrating until another master makes a request. This reduces
arbitration time, which then improves performance. When configured for external central
arbitration, the BG becomes an input signal to the MPC823 from the external arbiter. When
the internal on-chip arbiter is used, this signal is an output from the internal arbiter to the
external bus master.
13.4.6.3 BUS BUSY SIGNAL. The BB signal indicates that the current bus master is using
the bus. New masters must not begin transferring until this signal is negated. The bus owner
must not relinquish or negate this signal until its transfer is complete. To avoid contention on
the BB signal, masters must three-state this signal when it gets a logical 1 value. This
situation implies that the connection of an external pull-up resistor is needed to ensure that
a master acquiring the bus recognizes that the BB signal is negated, regardless of how
many cycles have passed since the previous master relinquished the bus. Refer to
Figure 13-21 for more information.
MPC823
Figure 13-21. Basic Bus Busy Connection
Freescale Semiconductor, Inc.
For More Information On This Product,
MPC823 REFERENCE MANUAL
Go to: www.freescale.com
EXTERNAL BUS
TS
BB
SLAVE 2
External Bus Interface
MASTER
13-29

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