mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 580

• Manufacturer Part Number: mpc823rg
• Description: Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
• Manufacturer: Freescale Semiconductor, Inc

Communication Processor Module
SMC1CS—SMC1 Clock Source (NMSI mode)
SMC1 can take its clocks from one of the baud rate generators or one of four pins from the
bank of clocks. The SMC1 transmit and receive clocks must be the same when it is
connected to the NMSI.
SDMA—Serial Interface Diagnostic Mode for TDMA
RFSDA—Receive Frame Sync Delay for TDMA
This field determines the number of clock delays between the receive sync and the first bit
of the receive frame. Even if the CRTA bit is set, these bits do not control the delay for the
transmit frame.
See the examples in Figure 16-50 and Figure 16-51 to find out how to use these bits.
000 = SMC1 transmit and receive clocks are BRG1.
001 = SMC1 transmit and receive clocks are BRG2.
010 = SMC1 transmit and receive clocks are BRG3.
011 = SMC1 transmit and receive clocks are BRG4.
100 = SMC1 transmit and receive clocks are CLK1.
101 = SMC1 transmit and receive clocks are CLK2.
110 = SMC1 transmit and receive clocks are CLK3.
111 = SMC1 transmit and receive clocks are CLK4.
00 = Normal operation.
01 = Automatic echo. In this mode, the channel transmitter automatically retransmits
10 = Internal loopback. In this mode, the TDM transmitter output is internally connected
11 = Loopback control. In this mode, the TDM transmitter output is internally connected
00 = No bit delay. The first bit of the frame is transmitted/received on the same clock
01 = 1-bit delay. Use for IDL.
10 = 2-bit delay.
11 = 3-bit delay.
the data received from the TDM on a bit-by-bit basis. The receive section operates
normally, but the transmit section can only retransmit received data. In this mode,
the L1GRA signal is ignored.
to the TDM receiver input (L1TXDA is connected to L1RXDA). The receiver and
transmitter operate normally. The data appears on the L1TXDA pin. In this mode
the L1RQA signal is asserted normally. The L1GRA signal is ignored.
to the TDM receiver input (L1TXDA is connected to L1RXDA). The transmitter
output (L1TXDA) and the L1RQA pin is inactive. This mode is used to accomplish
loopback testing of the entire TDM without affecting the external serial lines.
as the sync. Use for GCI.
Note: In modes 01,10, and 11, the receive and transmit clocks must be identical.
Freescale Semiconductor, Inc.
For More Information On This Product,
MPC823 REFERENCE MANUAL
Go to: www.freescale.com
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