mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 772

• Manufacturer Part Number: mpc823rg
• Description: Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
• Manufacturer: Freescale Semiconductor, Inc

Communication Processor Module
The EEST has similar names for its connection to the seven MPC823 pins mentioned above
and contains a loopback pin so the MPC823 can perform external loopback testing. This can
be controlled by any available parallel I/O pin on the MPC823. The passive components that
are needed to connect to AUI or twisted-pair media are external to the EEST. For more
information on the EEST connection circuits, refer to the MC68160 device description.
Using the SDMA channels, the MPC823 stores every byte that is received after the start
frame delimiter in system memory. When transmitting, you provide the destination address,
source address, type/length field, and transmit data. The MPC823 automatically pads
frames with less than 46 bytes in the data field to meet the minimum frame requirements. In
addition, the MPC823 appends the frame collision support to the frame.
16.9.22.5 SCCx ETHERNET CHANNEL FRAME TRANSMISSION PROCESS. The
Ethernet transmitter is designed to work with almost no intervention from the core. When the
core enables the transmitter, the SCCx Ethernet controller polls the first transmit (TX) buffer
descriptor in the channel TX buffer descriptor table every 128 serial clocks. If you have a
frame to transmit, you can set the TOD bit in the TODR to avoid waiting for the next poll to
occur. See Section 16.9.5 Transmit-on-Demand Register for more information.
To begin transmission, the SCCx Ethernet controller fetches the data from the data buffer,
asserts TENA to the EEST, and starts transmitting the preamble sequence, the start frame
delimiter, and frame information. However, the SCCx Ethernet controller defers
transmission if the line is busy. Before transmitting, it waits for carrier sense to become
inactive and stay that way for 6.0 s. If it does, then the SCCx Ethernet controller starts
transmitting after waiting an additional 3.6 s (9.6 s after carrier sense originally became
inactive).
If a collision occurs during frame transmission, the SCCx Ethernet controller follows the
specified backoff procedure and tries to retransmit the frame until the retry limit threshold is
reached. The SCCx Ethernet controller stores the first 5 to 8 bytes of the transmit frame in
internal RAM, so that they do not have to be retrieved from system memory in case of a
collision. This improves bus utilization and latency when the backoff timer output requires
an immediate retransmission. If a collision occurs during frame transmission, the SCCx
Ethernet controller returns to the first buffer for a retransmission. The only restriction is that
the first buffer must contain at least 9 bytes.
Note: If an Ethernet frame is made up of multiple buffers, you must not reuse the first
buffer descriptor until the last buffer descriptor of the frame has had its R bit
cleared by the communication processor module.
Freescale Semiconductor, Inc.
For More Information On This Product,
MPC823 REFERENCE MANUAL
Go to: www.freescale.com
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