mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 1066

• Manufacturer Part Number: mpc823rg
• Description: Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
• Manufacturer: Freescale Semiconductor, Inc

The instruction watchpoints and load/store match events on the address/data comparators
enter the load/store AND-OR logic where the load/store watchpoints and breakpoint are
generated. When asserted, the load/store watchpoints can generate the load/store
breakpoint or decrement one of the counters. When a counter on one of the load/store
watchpoints expires, the load/store breakpoint is asserted.
Watchpoints progress in the machine and are reported when they retire. Internal
breakpoints progress in the machine until they reach the top of the history buffer when the
machine branches to the breakpoint exception routine. So the breakpoint features can be
used without restricting the software, the address of the load/store cycle that generated the
load/store breakpoint is not stored in the data address register (DAR). In a load/store
breakpoint, the address of the load/store cycle that generated the breakpoint is stored in the
breakpoint address register (BAR). There are many types of internal watchpoints and
breakpoints:
• Four I-Address Comparators Supporting Equal, Not Equal, Greater Than, and Less
• Two L-Address Comparators Supporting Equal, Not Equal, Greater Than, and Less
• Two L-Data Comparators Supporting Equal, Not Equal, Greater Than, and Less Than.
• No Internal Breakpoint or Watchpoint Support for Unaligned Words and Half-Words.
• The L-Data Comparators Can Be Programmed to Treat Fixed-Point Numbers as
• Combined Comparator Pairs to Detect In and Out of Range Conditions, Including Either
• A Programmable AND-OR Logic Structure Between the Four Instruction Comparators
• A Programmable AND-OR Logic Structure Between the Four Instruction Watchpoints
• Five Watchpoint Pins, Three For the Instruction and Two For the Load/Store.
• Two Dedicated 16-Bit Down Counters. Each Can Be Programmed to Count Either an
• On-The-Fly Trap Enable Programming of the Different Internal Breakpoints Using the
• Watchpoints Do Not Change the Timing of the Machine.
• Internal Breakpoints and Watchpoints Are Detected on the Instruction During
• Internal Breakpoints and Watchpoints Are Detected on the Load/Store During Load/
• Instruction and Load/Store Breakpoints and Watchpoints Are Handled on Retirement
Than.
Than.
Signed or Unsigned Values.
Signed or Unsigned Values On the L-Data.
Results in Five Outputs, Four Instruction Watchpoints, and One Instruction Breakpoint.
and the Four Load/Store Comparators Results in Three Outputs, Two Load/Store
Watchpoints, and One Load/Store Breakpoint.
Instruction Watchpoint or a Load/Store Watchpoint. Only Architecturally Executed
Events are Counted.
Serial Interface of the Development Port. Software Control Is Also Available.
Instruction Fetch.
Store Bus Cycles.
and Then Reported.
Freescale Semiconductor, Inc.
For More Information On This Product,
MPC823 REFERENCE MANUAL
Go to: www.freescale.com
Development Capabilities and Interface
20-11