mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 629

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mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
I—Interrupt
For frame-oriented protocols, a message can reside in as many buffers as necessary. Each
buffer has a maximum length of (64K–1) bytes. The communication processor module does
not assume that all buffers of a single frame are currently linked to the buffer descriptor
table. It does assume, however, that the unlinked buffers are provided by the core in time to
be transmitted or received. When this does not occur, an error condition is reported by the
communication processor module. An underrun error is reported when data is transmitted
and a busy error is reported when data is received.
0 = No interrupt is generated after this buffer is serviced.
1 = The specific RX or TX bit in the protocol event register is set when this buffer is
serviced by the communication processor module. These bits can cause an
interrupt when enabled by the mask register.
DUAL- PORT RAM
TABLE POINTER
TABLE POINTER
SCCx TX BD
SCCx RX BD
SCCx RX BD
SCCx TX BD
TABLE
TABLE
Freescale Semiconductor, Inc.
Figure 16-63. SCCx Memory Structure
For More Information On This Product,
MPC823 REFERENCE MANUAL
Go to: www.freescale.com
FRAME STATUS
DATA POINTER
DATA LENGTH
FRAME STATUS
DATA POINTER
DATA LENGTH
TX BUFFER DESCRIPTORS
RX BUFFER DESCRIPTORS
Communication Processor Module
EXTERNAL MEMORY
RX DATA BUFFER
TX DATA BUFFER
16-177

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