mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 798

• Manufacturer Part Number: mpc823rg
• Description: Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
• Manufacturer: Freescale Semiconductor, Inc

Communication Processor Module
9. Program the CPCR to execute the INIT RX BD PARAMETER command for this
10. Write RFCR and TFCR with 0x18 for normal operation.
11. Write MRBLR with the maximum number of bytes per receive buffer. For this case,
12. Write C_PRES with 0xFFFFFFFF to comply with 32-bit CCITT-CRC.
13. Write C_MASK with 0xDEBB20E3 to comply with 32-bit CCITT-CRC.
14. Clear CRCEC, ALEC, and DISFC for clarity.
15. Write PAD with 0x8888 for the pad value.
16. Write RET_LIM with 0x000F.
17. Write MFLR with 0x05EE to make the maximum frame size 1,518 bytes.
18. Write MINFLR with 0x0040 to make the minimum frame size 64 bytes.
19. Write MAXD1 and MAXD2 with 0x05EE to make the maximum DMA count 1,518
20. Clear GADDR1–GADDR4. The group hash table is not used.
21. Write PADDR1_H with 0x0380, PADDR1_M with 0x12E0, and PADDR1_L with
22. Write P_Per with 0x0000. It is not used.
23. Clear IADDR1–IADDR4. The individual hash table is not used.
24. Clear TADDR_H, TADDR_M, and TADDR_L for clarity.
25. Initialize the RX buffer descriptor and assume the RX data buffer is at 0x00001000 in
26. Initialize the TX buffer descriptor and assume the TX data frame is at 0x00002000 in
27. Write 0xFFFF to the SCCE–Ethernet to clear any previous events.
28. Write 0x001A to the SCCM–Ethernet to enable the TXE, RXF, and TXB interrupts.
29. Write 0x20000000 to the CIMR so that SCC2 can generate a system interrupt. The
30. Write 0x00000000 to the GSMR_H to enable normal operation of all modes.
channel.
assume 1,520 bytes, so MRBLR = 0x05F0. In this example, the user wants to receive
an entire frame into one buffer, so the MRBLR value is chosen to be the first value
larger than 1,518 that is evenly divisible by four.
bytes.
0x5634 to configure the physical address 8003E0123456.
main memory. Write 0xB000 to Rx_BD_Status, 0x0000 to Rx_BD_Length (optional),
and 0x00001000 to Rx_BD_Pointer.
main memory and contains fourteen 8-bit characters (destination and source
addresses plus the type field). Write 0xFC00 to Tx_BD_Status, add PAD to the frame
and generate a CRC. Then write 0x000D to Tx_BD_Length and 0x00002000 to
Tx_BD_Pointer.
CICR must also be initialized.
Freescale Semiconductor, Inc.
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MPC823 REFERENCE MANUAL
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