mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 1335

• Manufacturer Part Number: mpc823rg
• Description: Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
• Manufacturer: Freescale Semiconductor, Inc

Index
PDDIR,
PER,
performance
performance, achieving the best,
periodic interrupt count register key,
periodic interrupt status and control register key,
periodic interrupt status and control register,
periodic interrupt timer block diagram,
periodic interrupt timer count register,
periodic interrupt timer register,
periodic interrupt timer,
periodic timers,
PGCRB,
phase jitter,
phase skew,
pin assignments
pinout diagram,
pins
pins,
pins, unconnected,
pipeline bubbles, cause of,
PIPR,
PISCR,
PISCRK,
PITC,
PITCK,
PITR,
pixel generation,
PLL,
PLL, low power, and reset control register,
PLL, low-power and reset control register key,
PLPRCRK,
PORESET,
port A
Port B
port B
27
Ethernet,
HDLC bus controller,
maximizing,
port A,
port B,
port C,
port D,
PWM channels,
assignment,
development support,
NMSI,
system interface unit,
universal serial bus,
data direction register,
data register,
open-drain register,
pin assignment register,
memory map,
13-7
2-1
17-13
12-24
12-25
17-9
5-27
12-23
16-494
17-15
5-27
16-152
16-476
16-481
16-486
16-493
5-27
2-6
5-14
5-13
16-331
,
15-42
2-1
9-15
23-2
4-2
18-9
16-477
3-11
2-12
16-22
12-22
16-477
16-351
16-258
12-29
20-29
16-478
6-5
Freescale Semiconductor, Inc.
16-478
For More Information On This Product,
12-25
5-24
MPC823 REFERENCE MANUAL
5-27
12-24
12-22
Go to: www.freescale.com
5-7
12-23
5-27
5-
port C
port D
port width (definition),
ports, special to MSR,
PORx,
power
power consumption
power control
power planes,
power rails,
power supply pins,
power supply requirements,
power, reducing,
power, switching schemes,
power-down mode, exiting from,
power-on reset,
power-on reset, state of key registers,
PowerPC core
PowerPC standards
data direction register,
data register,
open-drain register,
pin assignment register,
data direction register,
data register,
interrupt control register,
pin assignment register,
special options register,
data direction register,
data register,
pin assignment register,
conserving,
PCMCIA,
minimizing,
keep-alive power
keep-alive power,
operation,
power rails,
about the,
basic structure,
features,
PowerPC Operating Environment Architecture
PowerPC Operating Environment Architecture
PowerPC Operating Environment Architecture
(Book 3)
(Book 3),
17-17
register locking,
branch processor,
fixed-point processor,
interrupts,
optional facilities and instructions,
reference and change bits,
storage control instructions,
storage model,
timer facilities,
5-24
6-1
17-8
5-24
5-24
6-1
9-7
16-197
5-24
4-2
5-19
16-483
16-489
16-494
7-7
2-12
,
6-2
10-11
13-1
5-25
6-11
7-17
7-6
16-482
5-27
7-6
16-484
16-489
16-494
5-26
16-490
5-25
16-485
16-490
16-495
16-492
7-6
5-30
7-7
7-7
MOTOROLA
5-27
7-17