mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 1199

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mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
MPC823 Instruction Set—dcbtst
dcbtst
Assembler Syntax
Definition
Operation
Description
FIELD
FIELD
BIT
BIT
16
0
17
1
18
B
2
Freescale Semiconductor, Inc.
31
For More Information On This Product,
19
3
block containing the byte addressed by EA is fetched into the
data cache, because the program will probably soon store into
the addressed byte. The hint is ignored if the block is caching-
inhibited. Executing dcbtst does not cause the system
alignment error handler to be invoked.
This instruction operates as a load from the addressed byte with
respect to address translation and protection, except that no
exception occurs in the case of a translation fault or protection
violation. Also, if the referenced and changed bits are recorded,
they are recorded as if the access was a load.
The program uses dcbtst to request a cache block fetch to
guarantee that a subsequent store will be to a cached location.
The program can later execute store instructions to put data into
memory. However, the processor is not obliged to load the
addressed cache block into the data cache.
Other registers altered:
dcbtst
Data Cache Block Touch for Store
EA is the sum ( r A|0) + ( r B).
This instruction is a hint that performance will be improved if the
POWERPC ARCHITECTURE
20
MPC823 REFERENCE MANUAL
4
None
Go to: www.freescale.com
21
5
LEVEL
VEA
22
rA,rB
6
23
7
00000
24
8
25
9
SUPERVISOR
246
10
26
11
27
OPTIONAL
12
28
13
29
A
MOTOROLA
14
30
FORM
X
15
31
0

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