mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 346

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mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
External Bus Interface
The local bus interface block implements a reservation “flag” for the local bus master. The
reservation “flag” is set by the local bus interface when a load with reservation is issued by
the local bus master and the reservation address is located on the remote bus. The “flag” is
reset when an alternative master on the remote bus accesses the same location in a write
cycle. If the MPC823 begins a memory cycle to the previously reserved address (located in
the remote bus) as a result of a stwcx instruction, one of the following conditions can occur:
• If the reservation “flag” is set, the local bus interface acknowledges the cycle in a normal
• If the reservation “flag” is reset, the local bus interface must assert KR. However, the
way.
local bus interface must either not perform the remote bus write access or abort it if the
remote bus supports aborted cycles. The failure of the stwcx instruction is reported to
the core.
MPC823
Figure 13-27. Reservation On Multilevel Bus Hierarchy
INTERFACE
BUS
Freescale Semiconductor, Inc.
For More Information On This Product,
AT[0:3], RSV, R/W, TS
MPC823 REFERENCE MANUAL
KR
Go to: www.freescale.com
MPC823 EXTERNAL BUS
Q
REMOTE BUS
R
S
MASTER IN THE REMOTE
A[6:31]
RESERVED LOCATION
BUS WRITES TO THE
INTERFACE
LOCAL BUS
EXTERNAL DEVICE
MOTOROLA

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