mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 1042

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mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Video Controller
19.3.9 Video Frame Buffer A Start Address Register (Set 1)
The 32-bit video frame buffer A start address register set 1 (VFAA1) holds the start address
of the set_1 odd field. Since all bursts are required to be 16-byte aligned, this register does
not use the four least-significant bits of the address.
FAA1—Frame Buffer A Start Address for Set 1
This field designates the start address of the frame buffer A set 0 in system memory.
VFAA1
NOTE: X = - “Don’t Care” and — = Undefined.
RESET
RESET
FIELD
ADDR
FIELD
ADDR
R/W
R/W
BIT
BIT
16
0
17
1
18
2
Freescale Semiconductor, Inc.
For More Information On This Product,
19
3
20
MPC823 REFERENCE MANUAL
4
Go to: www.freescale.com
21
5
FAA1
R/W
(IMMR & 0xFFFF0000) + 0x820
(IMMR & 0xFFFF0000) + 0x822
22
6
23
7
FAA1
R/W
24
8
25
9
10
26
11
27
12
28
13
29
R/W
X
MOTOROLA
14
30
15
31

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