mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 807

no-image

mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
16.10.4.4 SOF TOKEN. When a start of frame (SOF) token packet is received, the USB
controller issues a SOF maskable interrupt and the frame number entry in the parameter
RAM is updated.
16.10.4.5 PRE TOKEN. The PRE token signals the hub that a low-speed transaction is
about to occur. The PRE token is only read by the hub. The USB controller ignores the PRE
token in slave mode. In host mode, the USB controller generates a full-speed PRE token
before any packet is sent to a low-speed peripheral.
16.10.5 USB Controller Parameter RAM Memory Map
The USB controller parameter RAM area begins at the USB base address. The area is used
for the general USB parameters. Notice that it is similar to the SCCx general-purpose
parameter RAM.
NOTE: You are only responsible for initializing the items in bold.
USB Base + 0C
USB Base + 00
USB Base + 02
USB Base + 04
USB Base + 06
USB Base + 08
USB Base + 10
USB Base + 12
USB Base + 14
ADDRESS
USB Base = (IMMR & 0xFFFF0000) + 0x3C00.
All references to registers in the parameter RAM table are actually implemented in the dual-port RAM
area as a memory-based register.
Table 16-34. USB Parameter RAM Memory Map
FRAME_N
RSTATE
EP0PTR
EP1PTR
EP2PTR
EP3PTR
Freescale Semiconductor, Inc.
RTEMP
RBCNT
NAME
RPTR
For More Information On This Product,
MPC823 REFERENCE MANUAL
Go to: www.freescale.com
Half Word
Half Word
Half-Word
Half Word
Half Word
Half-Word
WIDTH
Word
Word
Word
RX Internal Data Pointer
RX Internal Byte Count
Communication Processor Module
Endpoint 0 Register
Endpoint 1 Register
Endpoint 2 Register
Endpoint 3 Register
RX Internal State
DESCRIPTION
Frame Number
RX Temp
16-355

Related parts for mpc823rg