mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 545

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mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
The following bits are only used by the RISC microcontroller:
DCMR
RESET
• DCMR—This register controls the operation mode of the IDMA channel.
FIELD
ADDR
• SAPR—This address pointer points to the next source data byte that IDMA transfers.
• DAPR—This address pointer points to the next destination byte that IDMA writes. When
• IBPTR—This pointer points to the next buffer descriptor that the IDMA transfers data to
• WRITE_SP—This parameter must not be modified.
• S_BYTE_C—This parameter must not be modified.
• D_BYTE_C—This parameter must not be modified.
R/W
BIT
the buffer descriptor is first processed, the communication processor module initializes
these pointers to the programmed values in the buffer descriptor.
when it is in idle state or points to the current buffer descriptor during transfer
processing. After a reset or when the end of an IDMA buffer descriptor table is reached,
the communication processor module initializes this pointer to the value programmed
in the IBASE register.
Bits 0–10—Reserved
These bits are reserved and must be set to 0.
SIZE—Peripheral Port Size
00 = Word length.
01 = Half-word length.
10 = Byte length.
11 = Reserved.
TYPE—Source/Destination Type (Can Be Peripheral or Memory)
00 = Read and write from memory.
01 = Read from peripheral and write to memory.
10 = Read from memory and write to peripheral.
11 = Reserved.
SC—Single Cycle
0 = Dual-cycle mode.
1 = Single-cycle mode.
0
1
2
Freescale Semiconductor, Inc.
For More Information On This Product,
3
(IMMR & 0xFFFF0000) + 0x3CC2 (IDMA1) AND 0x3DC2 (IDMA2)
MPC823 REFERENCE MANUAL
4
RESERVED
Go to: www.freescale.com
R/W
5
0
6
7
8
9
Communication Processor Module
10
11
SIZE
R/W
0
12
13
TYPE
R/W
0
14
16-93
R/W
SC
15
0

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