mpc823rg Freescale Semiconductor, Inc, mpc823rg Datasheet - Page 816

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mpc823rg

Manufacturer Part Number
mpc823rg
Description
Mpc823 Powerquicc Integrated Communications Processor For Portable Systems
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Communication Processor Module
E—Empty
Bits 6–7, 10 and 15—Reserved
These bits are reserved and must be set to 0.
W—Wrap (Final Buffer Descriptor in Table)
I—Interrupt
L—Last
This bit is set by the USB controller when the buffer is closed due to the detection of an
end-of-packet condition on the bus or as the result of an error. This bit is written by the USB
controller after the received data has been placed into the associated data buffer.
F—First
This bit is set by the USB controller when the buffer contains the first byte of a packet. This
bit is written by the USB controller after the received data has been placed into the
associated data buffer.
0 = The data buffer associated with this RX buffer descriptor has been filled with
1 = The data buffer associated with this buffer descriptor is empty or reception is
0 = This is not the last buffer descriptor in the RX buffer descriptor table.
1 = This is the last buffer descriptor in the RX buffer descriptor table. After this buffer
0 = No interrupt is generated after this buffer has been filled.
1 = The RXB bit in the USB event register will be set when this buffer has been
0 = This buffer does not contain the last character of the message.
1 = This buffer contains the last character of the message.
0 = This buffer does not contain the first byte of the message.
1 = This buffer contains the first byte of the message.
received data or data reception has been aborted due to an error condition. The
core is free to examine or write to any fields of this RX buffer descriptor. The
communication processor module will not use this buffer descriptor again when the
E bit is zero.
currently in progress. This RX buffer descriptor and its associated receive buffer
are owned by the communication processor module. Once the E bit is set, the core
cannot write any fields to this RX buffer descriptor.
is used, the communication processor module receives incoming data into the first
buffer descriptor in the table (the buffer descriptor pointed to by RBASE). The
number of RX buffer descriptors in this table is programmable and determined only
by the W bit and the overall space constraints of the dual-port RAM.
completely filled by the communication processor module, thus indicating the need
for the core to process the buffer. The RXB bit can cause an interrupt if it is
enabled. This bit is written by the USB controller after the received data has been
placed into the associated data buffer.
Freescale Semiconductor, Inc.
For More Information On This Product,
MPC823 REFERENCE MANUAL
Go to: www.freescale.com
MOTOROLA

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