h8s-2628 Renesas Electronics Corporation., h8s-2628 Datasheet - Page 124

• Manufacturer Part Number: h8s-2628
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
• Manufacturer: Renesas Electronics Corporation.

Section 5 Interrupt Controller
Table 5.5
Legend:
m:
Note:
5.6.5
The DTC can be activated by an interrupt. For details, see section 8, Data Transfer Controller
(DTC).
5.7
5.7.1
When an interrupt enable bit is cleared to 0 to disable interrupts, the disabling becomes effective
after execution of the instruction.
When an interrupt enable bit is cleared to 0 by an instruction such as BCLR or MOV, and if an
interrupt is generated during execution of the instruction, the interrupt concerned will still be
enabled on completion of the instruction, and so interrupt exception handling for that interrupt will
be executed on completion of the instruction. However, if there is an interrupt request of higher
priority than that interrupt, interrupt exception handling will be executed for the higher-priority
interrupt, and the lower-priority interrupt will be ignored.
The same also applies when an interrupt source flag is cleared to 0.
Figure 5.6 shows an example in which the TCIEV bit in TIER_0 of the TPU is cleared to 0.
The above conflict will not occur if an enable bit or interrupt source flag is cleared to 0 while the
interrupt is masked.
Rev. 3.00 Oct 04, 2005 page 84 of 598
REJ09B0155-0300
Symbol
Instruction fetch
Branch address read
Stack manipulation
Number of wait states in an external device access.
*
DTC Activation by Interrupt
Usage Notes
Conflict between Interrupt Generation and Disabling
Not available in this LSI.
Number of States in Interrupt Handling Routine Execution Status
S
S
S
I
J
K
Internal
Memory
1
2-State
Access
4
8-Bit Bus
Object of Access
3-State
Access
6+2m
External Device*
2-State
Access
2
16-Bit Bus
3-State
Access
3+m