h8s-2628 Renesas Electronics Corporation., h8s-2628 Datasheet - Page 20

• Manufacturer Part Number: h8s-2628
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
• Manufacturer: Renesas Electronics Corporation.

Section 12 Programmable Pulse Generator (PPG)
12.1 Features............................................................................................................................. 275
12.2 Input/Output Pins.............................................................................................................. 277
12.3 Register Descriptions........................................................................................................ 277
12.4 Operation .......................................................................................................................... 284
12.5 Usage Notes ...................................................................................................................... 294
Section 13 Watchdog Timer
13.1 Features............................................................................................................................. 295
13.2 Register Descriptions........................................................................................................ 296
13.3 Operation .......................................................................................................................... 300
13.4 Interrupts........................................................................................................................... 301
13.5 Usage Notes ...................................................................................................................... 301
Rev. 3.00 Oct 04, 2005 page xx of xl
12.3.1 Next Data Enable Registers H, L (NDERH, NDERL) ........................................ 278
12.3.2 Output Data Registers H, L (PODRH, PODRL) ................................................. 279
12.3.3 Next Data Registers H, L (NDRH, NDRL) ......................................................... 280
12.3.4 PPG Output Control Register (PCR) ................................................................... 282
12.3.5 PPG Output Mode Register (PMR) ..................................................................... 283
12.4.1 Overview.............................................................................................................. 284
12.4.2 Output Timing ..................................................................................................... 285
12.4.3 Sample Setup Procedure for Normal Pulse Output.............................................. 286
12.4.4 Example of Normal Pulse Output (Example of Five-Phase Pulse Output).......... 287
12.4.5 Non-Overlapping Pulse Output ........................................................................... 288
12.4.6 Sample Setup Procedure for Non-Overlapping Pulse Output.............................. 290
12.4.7 Example of Non-Overlapping Pulse Output (Example of Four-Phase
12.4.8 Inverted Pulse Output .......................................................................................... 293
12.4.9 Pulse Output Triggered by Input Capture............................................................ 294
12.5.1 Module Stop Mode Setting .................................................................................. 294
12.5.2 Operation of Pulse Output Pins ........................................................................... 294
13.2.1 Timer Counter (TCNT)........................................................................................ 296
13.2.2 Timer Control/Status Register (TCSR)................................................................ 297
13.2.3 Reset Control/Status Register (RSTCSR)............................................................ 299
13.3.1 Watchdog Timer Mode Operation ....................................................................... 300
13.3.2 Interval Timer Mode............................................................................................ 300
13.5.1 Notes on Register Access .................................................................................... 301
13.5.2 Conflict between Timer Counter (TCNT) Write and Increment.......................... 302
13.5.3 Changing Value of CKS2 to CKS0 ..................................................................... 303
13.5.4 Switching between Watchdog Timer Mode and Interval Timer Mode................ 303
13.5.5 Internal Reset in Watchdog Timer Mode............................................................. 303
13.5.6 OVF Flag Clearing in Interval Timer Mode ........................................................ 303
Complementary Non-Overlapping Output) ......................................................... 291
............................................................................................. 295
.................................................... 275