h8s-2628 Renesas Electronics Corporation., h8s-2628 Datasheet - Page 27

• Manufacturer Part Number: h8s-2628
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
• Manufacturer: Renesas Electronics Corporation.

Section 1 Overview
Figure 1.1
Figure 1.2
Section 2 CPU
Figure 2.1
Figure 2.2
Figure 2.3
Figure 2.4
Figure 2.5
Figure 2.6
Figure 2.7
Figure 2.8
Figure 2.9
Figure 2.9
Figure 2.10
Figure 2.11
Figure 2.12
Figure 2.13
Section 3 MCU Operating Modes
Figure 3.1
Section 4 Exception Handling
Figure 4.1
Figure 4.2
Figure 4.3
Figure 4.4
Section 5 Interrupt Controller
Figure 5.1
Figure 5.2
Figure 5.3
Figure 5.4
Figure 5.5
Figure 5.6
Flowchart of Procedure Up to Interrupt Acceptance in Interrupt Control Mode 0 79
Internal Block Diagram .......................................................................................
Pin Arrangement..................................................................................................
Exception Vector Table (Normal Mode) ............................................................. 15
Stack Structure in Normal Mode ......................................................................... 15
Exception Vector Table (Advanced Mode) ......................................................... 16
Stack Structure in Advanced Mode ..................................................................... 17
Memory Map ....................................................................................................... 18
CPU Registers...................................................................................................... 19
Usage of General Registers.................................................................................. 20
Stack .................................................................................................................... 21
General Register Data Formats (1) ...................................................................... 24
General Register Data Formats (2) ...................................................................... 25
Memory Data Formats......................................................................................... 26
Instruction Formats (Examples)........................................................................... 39
Branch Address Specification in Memory Indirect Mode ................................... 43
State Transitions .................................................................................................. 47
Address Map........................................................................................................ 53
Reset Sequence (Advanced Mode with On-Chip ROM Enabled) ....................... 58
Reset Sequence (Advanced Mode with On-chip ROM Disabled:
Not Available in this LSI).................................................................................... 59
Stack Status after Exception Handling................................................................. 63
Operation when SP Value Is Odd ........................................................................ 64
Block Diagram of Interrupt Controller ................................................................ 66
Block Diagram of Interrupts IRQ5 to IRQ0 ........................................................ 73
Flowchart of Procedure Up to Interrupt Acceptance in Control Mode 2............. 81
Interrupt Exception Handling .............................................................................. 82
Conflict between Interrupt Generation and Disabling ......................................... 85
Figures
Rev. 3.00 Oct 04, 2005 page xxvii of xl
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