h8s-2628 Renesas Electronics Corporation., h8s-2628 Datasheet - Page 526

• Manufacturer Part Number: h8s-2628
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
• Manufacturer: Renesas Electronics Corporation.

Section 19 ROM
19.8.2
When erasing flash memory, the erase/erase-verify flowchart shown in figure 19.10 should be
followed.
1. Prewriting (setting erase block data to all 0s) is not necessary.
2. Erasing is performed in block units. Specify a single block o be erased with the erase block
3. The time during which the E bit is set to 1 is the flash memory erase time.
4. The watchdog timer (WDT) is set to prevent overerasing due to program runaway, etc. Set the
5. For a dummy write to a verify address, write 1-byte data H'FF to an address whose lower two
6. If the read data is not erased successfully, set erase mode again, and repeat the erase/erase-
19.8.3
All interrupts, including the
programmed, erased, or the boot program is being executed, for the following three reasons:
1. Interrupt during programming/erasing may cause a violation of the programming or erasing
2. If interrupt exception handling starts before the vector address is written or during
3. If an interrupt occurs during boot program execution, normal boot mode sequence cannot be
Rev. 3.00 Oct 04, 2005 page 486 of 598
REJ09B0155-0300
registers (EBR2 and EBR1). To erase multiple blocks, each block must be erased in turn.
overflow cycle to approximately 19.8 ms.
bits are B'00. Verify data can be read in longwords from the address to which a dummy write
was performed.
verify sequence as before. Note that the number of repetitions of the erase/erase-verify
sequence should be less than 100.
algorithm, with the result that normal operation cannot be assured.
programming/erasing, a correct vector cannot be fetched and the CPU malfunctions.
carried out.
Interrupt Handling when Programming/Erasing Flash Memory
Erase/Erase-Verify
N M I
interrupt, should be disabled while flash memory is being