h8s-2628 Renesas Electronics Corporation., h8s-2628 Datasheet - Page 370

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h8s-2628

Manufacturer Part Number
h8s-2628
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Section 14 Serial Communication Interface (SCI)
14.4
Figure 14.2 shows the general format for asynchronous serial communication. One frame consists
of a start bit (low level), followed by transfer/receive data (in LSB-first order), a parity bit (high or
low level), and finally stop bits (high level). In asynchronous serial communication, the
transmission line is usually held in the mark state (high level). The SCI monitors the transmission
line. When the transmission line goes to the space state (low level), the SCI recognizes a start bit
and starts serial communication. Inside the SCI, the transmitter and receiver are independent units,
enabling full-duplex. Both the transmitter and the receiver also have a double-buffered structure,
so data can be read or written during transmission or reception, enabling continuous data transfer.
14.4.1
Table 14.10 shows the data transfer formats that can be used in asynchronous mode. Any of 12
transfer formats can be selected according to the SMR setting. For details on the multiprocessor
bit, refer to section 14.5, Multiprocessor Communication Function.
Rev. 3.00 Oct 04, 2005 page 330 of 598
REJ09B0155-0300
Serial
data
Data Transfer Format
Operation in Asynchronous Mode
1
Start
bit
1 bit
0
Figure 14.2 Data Format in Asynchronous Communication
LSB
D0
(Example with 8-Bit Data, Parity, Two Stop Bits)
One unit of transfer data (character or frame)
D1
D2
Transmit/receive data
D3
8 or 7 bits
D4
D5
D6
MSB
D7
Parity
bit
1 bit,
or none
0/1
1
Stop bit
2 or
1 bits
1
Idle state
(mark state)
1

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