h8s-2628 Renesas Electronics Corporation., h8s-2628 Datasheet - Page 525

• Manufacturer Part Number: h8s-2628
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
• Manufacturer: Renesas Electronics Corporation.

Notes: 1. Data transfer is performed by byte transfer. The lower 8 bits of the first address written to
2. Verify data is read in 16-bit (word) units.
3. Reprogram data is determined by the operation shown in the table below (comparison between the data stored in the program data area and the verify data). Bits for which the reprogram data is 0 are
4. A 128-byte area for storing program data, a 128-byte area for storing reprogram data, and a 128-byte area for storing additional data must be provided in RAM.
5. A write pulse of 30 s or 200 s is applied according to the progress of the programming operation. See Note 6 for details of the pulse widths. When writing of additional-programming data is executed,
7. The wait times and value of N are shown in 23.5, Flash Memory Characteristics.
Reprogram Data Computation Table
must be H'00 or H'80.
A 128-byte data transfer must be performed even if writing fewer than 128 bytes; in this case,
H'FF data must be written to the extra addresses.
programmed in the next reprogramming loop. Therefore, even bits for which programming has been completed will be subjected to programming once again if the result of the subsequent verify operation is NG.
The contents of the reprogram data area and additional data area are modified as programming proceeds.
a 10 s write pulse should be applied. Reprogram data X' means reprogram data when the write pulse is applied.
Original Data
(D)
Note 6: Write Pulse Width
Note: * Use a 10 s write pulse for additional programming.
0
0
1
1
Number of Writes n
Write pulse application subroutine
1000
998
999
Reprogram data storage
10
11
12
13
Additional-programming
Clear PSU bit in FLMCR1
1
2
3
4
5
6
7
8
9
Verify Data
Program data storage
Set PSU bit in FLMCR1
Clear P bit in FLMCR1
Set P bit in FLMCR1
data storage area
area (128 bytes)
area (128 bytes)
Apply Write Pulse
(V)
0
1
0
1
Wait (t
Wait (t
(128 bytes)
WDT enable
Wait (t
Wait (t
Disable WDT
RAM
End Sub
spsu
cpsu
sp
cp
Write Time (tsp) s
) s
) s
Reprogram Data
) s
) s
Figure 19.9 Program/Program-Verify Flowchart
200
200
200
200
200
200
200
200
200
200
30
30
30
30
30
30
(X)
1
0
1
1
*
*
*
*
*
*
Programming completed
Programming incomplete; reprogram
Still in erased state; no action
*
*
*
*
Start of programming
End of programming
5
7
7
7
*
7
Comments
Increment address
Additional-Programming Data Computation Table
Reprogram Data
Successively write 128-byte data from additional-
programming data area in RAM to flash memory
Apply Write Pulse (Additional programming)
No
Transfer reprogram data to reprogram data area
Additional-programming data computation
(X')
0
0
1
1
Transfer additional-programming data to
Store 128-byte program data in program
data area consecutively to flash memory
Write 128-byte data in RAM reprogram
H'FF dummy write to verify address
data area and reprogram data area
additional-programming data area
Clear SWE bit in FLMCR1
Reprogram data computation
data verification completed?
Set SWE bit in FLMCR1
Clear PV bit in FLMCR1
Set PV bit in FLMCR1
Start of programming
End of programming
Verify Data
Apply
Wait (t
Read verify data
Wait (t
Wait (t
Rev. 3.00 Oct 04, 2005 page 485 of 598
Wait (t
Wait (t
Yes
Yes
Write data =
verify data?
(V)
Yes
128-byte
0
1
0
1
START
m = 0 ?
m = 0
6 n ?
6 n?
n = 1
Write pulse
sswe
cswe
spvr
spv
cpv
Yes
Yes
Sub-Routine-Call
Sub-Routine-Call
) s
) s
) s
) s
) s
Programming Data (Y)
Additional-
0
1
1
1
No
No
No
*
*
*
*
No
*
*
See Note 6 for pulse width
7
7
2
7
3
7
*
*
*
4
4
1
*
Additional programming to be executed
Additional programming not to be executed
Additional programming not to be executed
Additional programming not to be executed
*
m = 1
1
Perform programming in the erased state.
Do not perform additional programming
on previously programmed addresses.
4
Clear SWE bit in FLMCR1
Programming failure
Wait (t
n
REJ09B0155-0300
cswe
Comments
Section 19 ROM
(N) ?
Yes
) s
*
7
No
n
n + 1
Reprogram
*
7