h8s-2628 Renesas Electronics Corporation., h8s-2628 Datasheet - Page 61

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h8s-2628

Manufacturer Part Number
h8s-2628
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
2.4.2
This 24-bit counter indicates the address of the next instruction the CPU will execute. The length
of all CPU instructions is 2 bytes (one word), so the least significant PC bit is ignored (When an
instruction is fetched, the least significant PC bit is regarded as 0).
2.4.3
EXR is an 8-bit register that manipulates the LDC, STC, ANDC, ORC, and XORC instructions.
When these instructions, except for the STC instruction, are executed, all interrupts including NMI
will be masked for three states after execution is completed.
Bit
7
6 to 3
2
1
0
Program Counter (PC)
Extended Control Register (EXR)
Bit Name
T
I2
I1
I0
SP (ER7)
Initial Value
0
All 1
1
1
1
Figure 2.8 Stack
R/W
R/W
R/W
R/W
R/W
Description
Trace Bit
When this bit is set to 1, a trace exception is
generated each time an instruction is executed.
When this bit is cleared to 0, instructions are
executed in sequence.
Reserved
These bits are always read as 1.
These bits designate the interrupt mask level (7
to 0). For details, refer to section 5, Interrupt
Controller.
Rev. 3.00 Oct 04, 2005 page 21 of 598
Stack area
Free area
REJ09B0155-0300
Section 2 CPU

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