h8s-2628 Renesas Electronics Corporation., h8s-2628 Datasheet - Page 524

• Manufacturer Part Number: h8s-2628
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
• Manufacturer: Renesas Electronics Corporation.

Section 19 ROM
19.8
The flash memory is programmed or erased in on-board programming mode by a software method
using the CPU. Depending on the FLMCR1 setting, the flash memory operates in one of the
following four modes: Program mode, program-verify mode, erase mode, and erase-verify mode.
The programming control program in boot mode and the user program/erase control program in
user program mode perform programming/erasing in combination with these modes. Flash
memory programming and erasing should be performed in accordance with the descriptions in
section 19.8.1, Program/Program-Verify, and section 19.8.2, Erase/Erase-Verify, respectively.
19.8.1
When writing data or programs to the flash memory, the program/program-verify flowchart shown
in figure 19.9 should be followed. Performing programming operations according to this flowchart
will enable data or programs to be written to the flash memory without subjecting the chip to
voltage stress or sacrificing program data reliability.
1. Programming must be done on erased addresses. Do not perform additional programming or
2. Programming should be performed in units of 128 bytes. A 128-byte data must be transferred
3. Prepare the following data storage areas in RAM: A 128-byte programming data area, a 128-
4. Consecutively transfer 128 bytes of data in byte units from the reprogramming data area or
5. The time during which the P1 bit is set to 1 is the programming time. Figure 19.9 shows the
6. The watchdog timer (WDT) is set to prevent overprogramming due to program runaway, etc.
7. For a dummy write to a verify address, write 1-byte data H'FF to an address whose lower 2
8. The number of repetitions of the program/program-verify sequence for the same bit should be
Rev. 3.00 Oct 04, 2005 page 484 of 598
REJ09B0155-0300
previously programmed addresses.
even if data to be written is fewer than 128 bytes. In this case, H'FF data must be written to the
extra addresses.
byte reprogramming data area, and a 128-byte additional-programming data area. Perform
reprogramming data computation and additional programming data computation according to
figure 19.9.
additional-programming data area to the flash memory. The program address and 128-byte
data are latched in the flash memory. The lower 8 bits of the start address in the flash memory
destination area must be H'00 or H'80.
allowable programming times.
Set the overflow cycle to approximately 6.6 ms.
bits are B'00. Verify data can be read in longwords from the address to which a dummy write
was performed.
less than 1,000.
Program/Program-Verify
Flash Memory Programming/Erasing