h8s-2628 Renesas Electronics Corporation., h8s-2628 Datasheet - Page 257

• Manufacturer Part Number: h8s-2628
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
• Manufacturer: Renesas Electronics Corporation.

10.4.4
In cascaded operation, two 16-bit counters for different channels are used together as a 32-bit
counter.
This function works by counting the channel 1 (channel 4) counter clock upon overflow/underflow
of TCNT_2 (TCNT_5) as set in bits TPSC0 to TPSC2 in TCR.
Underflow occurs only when the lower 16-bit TCNT is in phase-counting mode.
Table 10.29 shows the register combinations used in cascaded operation.
Note: When phase counting mode is set for channel 1 or 4, the counter clock setting is invalid
Table 10.29 Cascaded Combinations
Example of Cascaded Operation Setting Procedure: Figure 10.17 shows an example of the
setting procedure for cascaded operation.
Combination
Channels 1 and 2
Channels 4 and 5
and the counters operates independently in phase counting mode.
Cascaded Operation
<Cascaded operation>
Cascaded operation
Figure 10.17 Cascaded Operation Setting Procedure
Set cascading
Start count
Upper 16 Bits
TCNT_1
TCNT_4
[1]
[2]
[1]
[2]
Set bits TPSC2 to TPSC0 in the channel 1
(channel 4) TCR to B'111 to select TCNT_2
(TCNT_5) overflow/underflow counting.
Set the CST bit in TSTR for the upper and lower
channel to 1 to start the count operation.
Section 10 16-Bit Timer Pulse Unit (TPU)
Rev. 3.00 Oct 04, 2005 page 217 of 598
Lower 16 Bits
TCNT_2
TCNT_5
REJ09B0155-0300