h8s-2628 Renesas Electronics Corporation., h8s-2628 Datasheet - Page 459

• Manufacturer Part Number: h8s-2628
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
• Manufacturer: Renesas Electronics Corporation.

after an HCAN interrupt is enabled by the interrupt controller without clearing the flag. IRR0
should therefore be cleared at initialization.
15.8.3
The bus operation interrupt flag (IRR12) in the interrupt register (IRR) is set by CAN bus
operation in HCAN sleep mode. Therefore, this flag is not used by the HCAN to indicate sleep
mode release. Note that the reset status bit (GSR3) in the general status register (GSR) is set even
in sleep mode.
15.8.4
When the mailbox interrupt mask register (MBIMR) is set, the interrupt registers (IRR8, 2, 1) are
not set by reception completion, transmission completion, or transmission cancellation of the set
mailboxes.
15.8.5
In the case of error active and error passive, REC and TEC perform count up and down normally.
In the bus-off state, 11-bit recessive sequences are counted (REC + 1) using REC. When REC
reaches 96 during the count, IRR4 and GSR1 are set.
15.8.6
Byte or word access can be performed for all HCAN registers. Longword access should be
avoided.
15.8.7
In medium-speed mode, the HCAN registers cannot be read/written.
15.8.8
All HCAN registers are initialized in hardware standby mode and software standby mode.
15.8.9
Since the HCAN status flag is cleared by writing 1, do not use the bit manipulation instructions to
clear the flag. To clear the flag, use the MOV instructions and write 1 only to the bit to be cleared.
HCAN Sleep Mode
HCAN Medium-Speed Mode
Interrupts
Error Counters
Register Access
Register Hold in Standby Modes
Use on Bit Manipulation Instructions
Section 15 Controller Area Network (HCAN)
Rev. 3.00 Oct 04, 2005 page 419 of 598
REJ09B0155-0300