h8s-2628 Renesas Electronics Corporation., h8s-2628 Datasheet - Page 481

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h8s-2628

Manufacturer Part Number
h8s-2628
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Section 16 Synchronous Serial Communication Unit (SSU)
Data Reception
Figure 16.7 shows an example of reception operation, and figure 16.8 shows an example of data
reception flowchart.
When receiving data, the SSU operates as shown below.
After initialization, the SSU dummy-reads SSRDR and data reception is started.
In master device mode, the SSU outputs a transfer clock and receives data. In slave device mode,
when a low level signal is input to the
pin and a transfer clock is input to the SSCK pin, the
S C S
SSU receives data in synchronization with the transfer clock.
When 1-frame data has been received, the received data is stored in SSRDR. At this time, if the
RIE bit is set to 1, an RXI interrupt is generated. The RDRF bit is automatically cleared to 0 by
reading SSRDR.
Rev. 3.00 Oct 04, 2005 page 441 of 598
REJ09B0155-0300

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