h8s-2628 Renesas Electronics Corporation., h8s-2628 Datasheet - Page 31

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h8s-2628

Manufacturer Part Number
h8s-2628
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Figure 14.8
Figure 14.9
Figure 14.9
Figure 14.10 Example of Communication Using Multiprocessor Format
Figure 14.11 Sample Multiprocessor Serial Transmission Flowchart ...................................... 343
Figure 14.12 Example of SCI Operation in Reception (Example with 8-Bit Data,
Figure 14.13 Sample Multiprocessor Serial Reception Flowchart (1) ...................................... 345
Figure 14.13 Sample Multiprocessor Serial Reception Flowchart (2) ...................................... 346
Figure 14.14 Data Format in Synchronous Communication (For LSB-First)........................... 347
Figure 14.15 Sample SCI Initialization Flowchart.................................................................... 348
Figure 14.16 Sample SCI Transmission Operation in Clocked Synchronous Mode ................ 350
Figure 14.17 Sample Serial Transmission Flowchart ............................................................... 351
Figure 14.18 Example of SCI Operation in Reception ............................................................. 352
Figure 14.19 Sample Serial Reception Flowchart..................................................................... 353
Figure 14.20 Sample Flowchart of Simultaneous Serial Transmit and Receive Operations..... 355
Figure 14.21 Schematic Diagram of Smart Card Interface Pin Connections ............................ 356
Figure 14.22 Normal Smart Card Interface Data Format.......................................................... 357
Figure 14.23 Direct Convention (SDIR = SINV = O/
Figure 14.24 Inverse Convention (SDIR = SINV = O/
Figure 14.25 Receive Data Sampling Timing in Smart Card Mode
Figure 14.26 Retransfer Operation in SCI Transmit Mode....................................................... 362
Figure 14.27 TEND Flag Generation Timing in Transmission Operation................................ 362
Figure 14.28 Example of Transmission Processing Flow ......................................................... 363
Figure 14.29 Retransfer Operation in SCI Receive Mode ........................................................ 364
Figure 14.30 Example of Reception Processing Flow .............................................................. 365
Figure 14.31 Timing for Fixing Clock Output Level................................................................ 366
Figure 14.32 Clock Halt and Restart Procedure........................................................................ 367
Section 15 Controller Area Network (HCAN)
Figure 15.1
Figure 15.2
Figure 15.3
Figure 15.4
Figure 15.5
Figure 15.6
Figure 15.7
Figure 15.8
Example of SCI Operation in Reception (Example with 8-Bit Data, Parity,
One Stop Bit) ....................................................................................................... 337
Sample Serial Reception Data Flowchart (1)....................................................... 339
Sample Serial Reception Data Flowchart (2)....................................................... 340
(Transmission of Data H'AA to Receiving Station A)......................................... 342
Multiprocessor Bit, One Stop Bit) ....................................................................... 344
(Using Clock of 372 Times the Transfer Rate).................................................... 360
HCAN Block Diagram......................................................................................... 372
Message Control Register Configuration............................................................. 396
Standard Format .................................................................................................. 396
Extended Format.................................................................................................. 396
Message Data Configuration ............................................................................... 398
Hardware Reset Flowchart................................................................................... 401
Software Reset Flowchart.................................................................................... 402
Detailed Description of One Bit .......................................................................... 403
E
E
= 0)..................................................... 358
= 1)................................................... 358
Rev. 3.00 Oct 04, 2005 page xxxi of xl

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