h8s-2628 Renesas Electronics Corporation., h8s-2628 Datasheet - Page 485

• Manufacturer Part Number: h8s-2628
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
• Manufacturer: Renesas Electronics Corporation.

[3]
Note: Hatching boxes represent SSU internal operations.
[1]
[2]
No
Data transferred from SSTDR to SSTRSR
TDRE set to 1 to start transmission
Figure 16.9 Example of Simultaneous Transmission/Reception Flowchart
Clear TE and RE in SSER to 0
Read received data in SSRDR
Write transmit data to SSTDR
RDRF automatically cleared
TDRE automatically cleared
End transmission/reception
Clear TEND in SSSR to 0
transmission/reception
1-bit internal elapsed?
Read TDRE in SSSR
Read TEND in SSSR
Continuous data
Read SSSR
Initialization
ORER = 1?
TEND = 1?
TDRE = 1?
RDRF = 1?
Yes
Start
Yes
Yes
Yes
No
No
Yes
Section 16 Synchronous Serial Communication Unit (SSU)
No
Yes
No
[5]
No
Error processing
[4]
[1] Initialization:
[2] Check the SSU state and write transmit data:
[3] Check the SSU state:
[4] Receive error processing:
[5] Procedure for continuous data transmission/
Rev. 3.00 Oct 04, 2005 page 445 of 598
Specify the settings such as transmit/receive
data format.
Write transmit data to SSTDR after reading
and confirming that the TDRE bit is 1. The
TDRE bit is automatically cleared to 0 and
transmission is started by writing data to
SSTDR.
Read SSSR and confirm that the RDRF bit is 1.
A change of the RDRF bit (from 0 to 1)
can be notified by RXI interrupt.
When a receive error occurs, execute the
designated error processing after reading the
ORER bit in SSSR. After that, clear the ORER
bit to 0. While the ORER bit is set to 1,
transmission or reception is not resumed.
reception:
To continue serial data transmission/reception,
confirm that the TDRE bit 1meaning that SSTDR
is ready to be written to. After that, data can be
written to SSTDR. The TDRE bit is automatically
cleared to 0 by writing data to SSTDR.
REJ09B0155-0300