h8s-2628 Renesas Electronics Corporation., h8s-2628 Datasheet - Page 528

• Manufacturer Part Number: h8s-2628
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
• Manufacturer: Renesas Electronics Corporation.

Section 19 ROM
19.9
There are three kinds of flash memory program/erase protection; hardware protection, software
protection, and error protection.
19.9.1
Hardware protection refers to a state in which programming/erasing of flash memory is forcibly
disabled or aborted because of a transition to reset or standby mode. Flash memory control register
1 (FLMCR1), flash memory control register 2 (FLMCR2), and erase block register 1 (EBR1) are
initialized. In a reset via the
until oscillation settles after powering on. In the case of a reset during operation, hold the
low for the
19.9.2
Software protection can be implemented against programming/erasing of all flash memory blocks
by clearing the SWE bit in FLMCR1. When software protection is in effect, setting the P1 or E1
bit in FLMCR1 does not cause a transition to program mode or erase mode. By setting the erase
block register 1 (EBR1), erase protection can be set for individual blocks. When EBR1 is set to
H'00, erase protection is set for all blocks.
19.9.3
In error protection, an error is detected when CPU runaway occurs during flash memory
programming/erasing, or operation is not performed in accordance with the program/erase
algorithm, and the program/erase operation is aborted. Aborting the program/erase operation
prevents damage to the flash memory due to overprogramming or overerasing.
When the following errors are detected during programming/erasing of flash memory, the FLER
bit in FLMCR2 is set to 1, and the error protection state is entered.
The FLMCR2, FLMCR1, and EBR1 settings are retained, however program mode or erase mode
is aborted at the point at which the error occurred. Program mode or erase mode cannot be re-
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REJ09B0155-0300
When the flash memory of the relevant address area is read during programming/erasing
(including vector read and instruction fetch)
Immediately after exception handling (excluding a reset) during programming/erasing
When a SLEEP instruction is executed during programming/erasing
Program/Erase Protection
Hardware Protection
Software Protection
Error Protection
R E S
pulse width specified in the AC characteristics section.
R E S
pin, the reset state is not entered unless the
R E S
pin is held low
R E S
pin