h8s-2628 Renesas Electronics Corporation., h8s-2628 Datasheet - Page 516

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h8s-2628

Manufacturer Part Number
h8s-2628
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Section 19 ROM
19.5.4
EBR2 specifies the flash memory erase area block. EBR1 is initialized to H'00 when the SWE bit
in FLMCR1 is 0. Do not set more than one bit at a time, otherwise, all the bits in EBR1 are be
automatically cleared to 0.
19.5.5
RAMER specifies the area of flash memory to be overlapped with part of RAM when emulating
real-time flash memory programming. RAMER settings should be made in user mode or user
program mode. To ensure correct operation of the emulation function, the ROM for which RAM
emulation is performed should not be accessed immediately after this register has been modified.
If accessed, normal access execution is not guaranteed.
Rev. 3.00 Oct 04, 2005 page 476 of 598
REJ09B0155-0300
Bit
7 to
2
1
0
Bit
7
6
5
4
3
Bit Name
EB9
EB8
Bit Name
RAMS
Erase Block Register 2 (EBR2)
RAM Emulation Register (RAMER)
Initial Value
All 0
0
0
Initial Value
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
Description
Reserved
These bits are always read as 0.
When this bit is set to 1, 32 kbytes of EB9
(H'018000 to H'01FFFF) will be erased.
When this bit is set to 1, 32 kbytes of EB8
(H'010000 to H'017FFF) will be erased.
Description
Reserved
These bits are always read as 0.
Reserved
Only 0 should be written to these bits.
RAM Select
Specifies selection or non-selection of flash
memory emulation in RAM. When RAMS = 1, the
flash memory is overlapped with part of RAM, and
all flash memory blocks are program/erase-
protected.

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