h8s-2628 Renesas Electronics Corporation., h8s-2628 Datasheet - Page 294

• Manufacturer Part Number: h8s-2628
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
• Manufacturer: Renesas Electronics Corporation.

Section 11 8-Bit Timers
11.3.1
Each TCNT is an 8-bit up-counter. TCNT_1 and TCNT_0, or TCNT_3 and TCNT_2 comprise a
single 16-bit register, so they can be accessed together by word access.
This clock source is selected by clock select bits CKS2 to CKS0 in TCR. TCNT can be cleared by
an external reset input signal or compare-match signals A and B. Counter clear bits CCLR1 and
CCLR0 in TCR select the method of clearing.
When TCNT overflows from H'FF to H'00, the overflow flag (OVF) in TCSR is set to 1.
The initial value of TCNT is H'00.
11.3.2
TCORA is an 8-bit readable/writable register. TCORA_3, TCORA_2, TCORA_1 and TCORA_0
comprise a single 16-bit register, so they can be accessed together by word access.
TCORA is continually compared with the value in TCNT. When a match is detected, the
corresponding compare-match flag A (CMFA) in TCSR is set. Note, however, that comparison is
disabled during the T
The timer output from the TMO pin can be freely controlled by the compare-match signal A and
the settings of output select bits OS1 and OS0 in TCSR.
The initial value of TCORA is H'FF.
11.3.3
TCORB is an 8-bit readable/writable register. TCORB_3, TCORB_2, TCORB_1 and TCORB_0
comprise a single 16-bit register, so they can be accessed together by word access.
TCORB is continually compared with the value in TCNT. When a match is detected, the
corresponding compare-match flag B (CMFB) in TCSR is set. Note, however, that comparison is
disabled during the T
Rev. 3.00 Oct 04, 2005 page 254 of 598
REJ09B0155-0300
Time constant register A_3 (TCORA_3)
Time constant register B_3 (TCORB_3)
Timer control register_3 (TCR_3)
Timer control/status register_3 (TCSR_3)
Timer Counters (TCNT)
Time Constant Registers A (TCORA)
Time Constant Registers B (TCORB)
2
2
state of a TCORA write cycle.
state of a TCORB write cycle.