h8s-2628 Renesas Electronics Corporation., h8s-2628 Datasheet - Page 399

• Manufacturer Part Number: h8s-2628
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
• Manufacturer: Renesas Electronics Corporation.

14.7.3
Operation in block transfer mode is the same as that in SCI asynchronous mode, except for the
following points.
14.7.4
In Smart Card interface mode, the SCI operates on a basic clock with a frequency of 32, 64, 372,
or 256 times the transfer rate (fixed at 16 times in normal asynchronous mode) as determined by
bits BCP1 and BCP0. In reception, the SCI samples the falling edge of the start bit using the basic
clock, and performs internal synchronization. As shown in figure 14.25, by sampling receive data
at the rising-edge of the 16th, 32nd, 186th, or 128th pulse of the basic clock, data can be latched at
the middle of the bit. The reception margin is given by the following formula.
Where M: Reception margin (%)
Assuming values of F = 0, D = 0.5 and N = 372 in the above formula, the reception margin
formula is as follows.
In reception, though the parity check is performed, no error signal is output even if an error is
detected. However, the PER bit in SSR is set to 1 and must be cleared before receiving the
parity bit of the next frame.
In transmission, a guard time of at least 1 etu is left between the end of the parity bit and the
start of the next frame.
In transmission, because retransmission is not performed, the TEND flag is set to 1, 11.5 etu
after transmission start.
As with the normal Smart Card interface, the ERS flag indicates the error signal status, but
since error signal transfer is not performed, this flag is always cleared to 0.
M = | (0.5 –
N: Ratio of bit rate to clock (N = 32, 64, 372, and 256)
D: Clock duty cycle (D = 0 to 1.0)
L: Frame length (L = 10)
F: Absolute value of clock frequency deviation
M = (0.5 – 1/2 372) 100%
Block Transfer Mode
Receive Data Sampling Timing and Reception Margin in Smart Card Interface
Mode
= 49.866%
2N
1
) – (L – 0.5) F –
| D – 0.5 |
Section 14 Serial Communication Interface (SCI)
N
(1 + F) | × 100%
Rev. 3.00 Oct 04, 2005 page 359 of 598
REJ09B0155-0300