h8s-2628 Renesas Electronics Corporation., h8s-2628 Datasheet - Page 91

• Manufacturer Part Number: h8s-2628
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
• Manufacturer: Renesas Electronics Corporation.

3.2.2
SYSCR is an 8-bit readable/writable register that selects saturating or non-saturating calculation
for the MAC instruction, selects the interrupt control mode and the detected edge for NMI, and
enables or disables on-chip RAM.
Bit
7
6
5
4
3
2, 1
0
Bit Name
MACS
INTM1
INTM0
NMIEG
RAME
System Control Register (SYSCR)
Initial Value
0
0
0
0
0
All 0
1
R/W
R/W
R/W
R/W
R/W
R/W
Descriptions
MAC Saturation
Selects either saturating or non-saturating calculation
for the MAC instruction.
0: Non-saturating calculation for the MAC instruction
1: Saturating calculation for the MAC instruction
Reserved
This bit is always read as 0 and cannot be modified.
These bits select the control mode of the interrupt
controller. For details of the interrupt control modes,
see section 5.6, Interrupt Control Modes and Interrupt
Operation.
00: Interrupt control mode 0
01: Setting prohibited
10: Interrupt control mode 2
11: Setting prohibited
NMI Edge Select
Selects the valid edge of the NMI interrupt input.
0: An interrupt is requested at the falling edge of NMI
1: An interrupt is requested at the rising edge of NMI
Reserved
These bits are always read as 0 and cannot be
modified.
RAM Enable
Enables or disables on-chip RAM. The RAME bit is
initialized when the reset status is released.
0: On-chip RAM is disabled
1: On-chip RAM is enabled
input
input
Rev. 3.00 Oct 04, 2005 page 51 of 598
Section 3 MCU Operating Modes
REJ09B0155-0300