h8s-2628 Renesas Electronics Corporation., h8s-2628 Datasheet - Page 460

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h8s-2628

Manufacturer Part Number
h8s-2628
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Section 15 Controller Area Network (HCAN)
15.8.10 HCAN TXCR Operation
1. When the transmit wait cancel register (TXCR) is used to cancel a transmit wait message in a
2. When the bus-off state is entered while TXPR is set and the transmit wait state is entered, the
Rev. 3.00 Oct 04, 2005 page 420 of 598
REJ09B0155-0300
transmit wait mailbox, the corresponding bit to TXCR and the transmit wait register (TXPR)
may not be cleared even if transmission is canceled. This occurs when the following conditions
are all satisfied.
Conditions:
To avoid this, one of the following countermeasures must be executed.
Countermeasures:
internal state machine does not operate even if TXCR is set during the bus-off state. Therefore
transmission cannot be canceled. The message can be canceled when one message is
transmitted or a transmission error occurs after the bus-off state is recovered. To clear a
message after the bus-off state is recovered, the following countermeasure must be executed.
Countermeasure:
The HRxD pin is stacked to 1 because of a CAN bus error, etc.
There is at least one mailbox waiting for transmission or being transmitted.
The message transmission in a mailbox being transmitted is canceled by TXCR.
If this occurs, transmission is canceled. However, since TXPR and TXCR states are
indicated wrongly that a message is being cancelled, transmission cannot be restarted even
if the stack state of the HRxD pin is canceled and the CAN bus recovers the normal state. If
there are at least two transmission messages, a message which is not being transmitted is
canceled and a message being transmitted retains its state.
Transmission must not be canceled by TXCR. When transmission is normally completed
after the CAN bus has recovered, TXPR is cleared and the HCAN recovers the normal
state.
To cancel transmission, the corresponding bit to TXCR must be written to 1 continuously
until the bit becomes 0. TXPR and TXCR are cleared and the HCAN recovers the normal
state.
A transmit wait message must be cleared by resetting the HCAN during the bus-off period.
To reset the HCAN, the module stop bit (MSTPC3 in MSTPCRC) must be set or cleared.
In this case, the HCAN is entirely reset. Therefore the initial settings must be made again.

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