h8s-2628 Renesas Electronics Corporation., h8s-2628 Datasheet - Page 372

• Manufacturer Part Number: h8s-2628
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
• Manufacturer: Renesas Electronics Corporation.

Section 14 Serial Communication Interface (SCI)
14.4.2
In asynchronous mode, the SCI operates on a basic clock with a frequency of 16 times the transfer
rate. In reception, the SCI samples the falling edge of the start bit using the basic clock, and
performs internal synchronization. Receive data is latched internally at the rising edge of the 8th
pulse of the basic clock as shown in figure 14.3. Thus, the reception margin in asynchronous mode
is given by formula (1) below.
Where N: Ratio of bit rate to clock (N = 16)
Assuming values of F (absolute value of clock rate deviation) = 0 and D (clock duty cycle) = 0.5
in formula (1), the reception margin can be given by the formula.
However, this is only the computed value, and a margin of 30% to 20% should be allowed for in
system design.
Rev. 3.00 Oct 04, 2005 page 332 of 598
REJ09B0155-0300
Internal basic
clock
Receive data
(RxD)
Synchronization
sampling timing
Data sampling
timing
M = { (0.5 –
D: Clock duty cycle (D = 0.5 to 1.0)
L: Frame length (L = 9 to 12)
F: Absolute value of clock rate deviation
M = {0.5 – 1/(2 16)} 100 [%] = 46.875%
Receive Data Sampling Timing and Reception Margin in Asynchronous Mode
Figure 14.3 Receive Data Sampling Timing in Asynchronous Mode
2N
0
1
8 clocks
Start bit
) –
D – 0.5
16 clocks
N
7
– (L – 0.5) F} × 100 [%]
15 0
D0
... Formula (1)
7
15 0
D1