h8s-2628 Renesas Electronics Corporation., h8s-2628 Datasheet - Page 290

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h8s-2628

Manufacturer Part Number
h8s-2628
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Section 10 16-Bit Timer Pulse Unit (TPU)
10.9.12 Conflict between TCNT Write and Overflow/Underflow
If there is an up-count or down-count in the T
overflow/underflow occurs, the TCNT write takes precedence and the TCFV/TCFU flag in TSR is
not set.
Figure 10.53 shows the operation timing when there is conflict between TCNT write and
overflow.
10.9.13 Multiplexing of I/O Pins
In this LSI, the TCLKA input pin is multiplexed with the TIOCC0 I/O pin, the TCLKB input pin
with the TIOCD0 I/O pin, the TCLKC input pin with the TIOCB1 I/O pin, and the TCLKD input
pin with the TIOCB2 I/O pin. When an external clock is input, compare match output should not
be performed from a multiplexed pin.
10.9.14 Interrupts in Module Stop Mode
If module stop mode is entered when an interrupt has been requested, it will not be possible to
clear the CPU interrupt source or the DTC activation source. Interrupts should therefore be
disabled before entering module stop mode.
Rev. 3.00 Oct 04, 2005 page 250 of 598
REJ09B0155-0300
Address
Write signal
TCNT
TCFV flag
Figure 10.53 Conflict between TCNT Write and Overflow
H'FFFF
Prohibited
TCNT write cycle
T
TCNT address
2
1
state of a TCNT write cycle, and
T
2
M
TCNT write data

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