h8s-2628 Renesas Electronics Corporation., h8s-2628 Datasheet - Page 97

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h8s-2628

Manufacturer Part Number
h8s-2628
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
4.3
A reset has the highest exception priority.
When the
this LSI is reset, hold the
operation, hold the
CPU and the registers of on-chip peripheral modules.
The chip can also be reset by overflow of the watchdog timer. For details, see section 13,
Watchdog Timer.
The interrupt control mode is 0 immediately after reset.
4.3.1
When the
exception handling as follows:
1. The internal state of the CPU and the registers of the on-chip peripheral modules are
2. The reset exception handling vector address is read and transferred to the PC, and program
Figures 4.1 and 4.2 show examples of the reset sequence.
initialized, the T bit in EXR is cleared to 0, and the I bit in EXR and CCR is set to 1.
execution starts from the address indicated by the PC.
Reset
Reset Exception Handling
R E S
R E S
pin goes low, all processing halts and this LSI enters the reset state. To ensure that
pin goes high after being held low for the necessary period, this LSI starts reset
R E S
pin low for at least 20 states. A reset initializes the internal state of the
R E S
pin low for at least 20 ms at power-up. To reset the chip during
Rev. 3.00 Oct 04, 2005 page 57 of 598
Section 4 Exception Handling
REJ09B0155-0300

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