h8s-2628 Renesas Electronics Corporation., h8s-2628 Datasheet - Page 24

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h8s-2628

Manufacturer Part Number
h8s-2628
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
17.2 Input/Output Pins.............................................................................................................. 451
17.3 Register Description ......................................................................................................... 452
17.4 Operation .......................................................................................................................... 456
17.5 Interrupt Source ................................................................................................................ 459
17.6 A/D Conversion Accuracy Definitions ............................................................................. 460
17.7 Usage Notes ...................................................................................................................... 462
Section 18 RAM
Section 19 ROM
19.1 Features............................................................................................................................. 467
19.2 Mode Transitions .............................................................................................................. 468
19.3 Block Configuration ......................................................................................................... 472
19.4 Input/Output Pins.............................................................................................................. 473
19.5 Register Descriptions........................................................................................................ 473
19.6 On-Board Programming Modes........................................................................................ 477
19.7 Flash Memory Emulation in RAM ................................................................................... 482
19.8 Flash Memory Programming/Erasing............................................................................... 484
Rev. 3.00 Oct 04, 2005 page xxiv of xl
17.3.1 A/D Data Registers A to D (ADDRA to ADDRD) ............................................. 452
17.3.2 A/D Control/Status Register (ADCSR) ............................................................... 453
17.3.3 A/D Control Register (ADCR) ............................................................................ 455
17.4.1 Single Mode......................................................................................................... 456
17.4.2 Scan Mode ........................................................................................................... 456
17.4.3 Input Sampling and A/D Conversion Time ......................................................... 457
17.4.4 External Trigger Input Timing............................................................................. 459
17.7.1 Module Stop Mode Setting .................................................................................. 462
17.7.2 Permissible Signal Source Impedance ................................................................. 462
17.7.3 Influences on Absolute Accuracy ........................................................................ 462
17.7.4 Range of Analog Power Supply and Other Pin Settings...................................... 463
17.7.5 Notes on Board Design ........................................................................................ 463
17.7.6 Notes on Noise Countermeasures ........................................................................ 463
19.5.1 Flash Memory Control Register 1 (FLMCR1) .................................................... 473
19.5.2 Flash Memory Control Register 2 (FLMCR2) .................................................... 475
19.5.3 Erase Block Register 1 (EBR1) ........................................................................... 475
19.5.4 Erase Block Register 2 (EBR2) ........................................................................... 476
19.5.5 RAM Emulation Register (RAMER)................................................................... 476
19.6.1 Boot Mode ........................................................................................................... 478
19.6.2 Programming/Erasing in User Program Mode..................................................... 480
19.8.1 Program/Program-Verify..................................................................................... 484
19.8.2 Erase/Erase-Verify............................................................................................... 486
19.8.3 Interrupt Handling when Programming/Erasing Flash Memory.......................... 486
.................................................................................................................. 465
.................................................................................................................. 467

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