IP-PCIE/1 Altera, IP-PCIE/1 Datasheet - Page 261

IP CORE - PCI Express X1 Lane

IP-PCIE/1

Manufacturer Part Number
IP-PCIE/1
Description
IP CORE - PCI Express X1 Lane
Manufacturer
Altera
Type
MegaCorer
Datasheets

Specifications of IP-PCIE/1

Software Application
IP CORE, Interface And Protocols, PCI
Supported Families
Arria GX, Cyclone II, HardCopy II, Stratix II
Core Architecture
FPGA
Core Sub-architecture
Arria, Cyclone, Stratix
Rohs Compliant
NA
Function
PCI Express Compiler, x1 Link Width
License
Initial License
Lead Free Status / RoHS Status
na
Lead Free Status / RoHS Status
na
Chapter 15: Testbench and Design Example
Root Port BFM
December 2010 Altera Corporation
Issuing Read and Write Transactions to the Application Layer
Figure 15–9
Figure 15–9. I/O Address Space
Read and write transactions are issued to the endpoint application layer by calling
one of the ebfm_bar procedures in altpcietb_bfm_rdwr. The procedures and
functions listed below are available in the VHDL package file
altpcietb_bfm_rdwr.vhd or in the Verilog HDL include file altpcietb_bfm_rdwr.v.
The complete list of available procedures and functions is as follows:
ebfm_barwr—writes data from BFM shared memory to an offset from a specific
endpoint BAR. This procedure returns as soon as the request has been passed to
the VC interface module for transmission.
ebfm_barwr_imm—writes a maximum of four bytes of immediate data (passed in a
procedure call) to an offset from a specific endpoint BAR. This procedure returns
as soon as the request has been passed to the VC interface module for
transmission.
ebfm_barrd_wait—reads data from an offset of a specific endpoint BAR and stores
it in BFM shared memory. This procedure blocks waiting for the completion data
to be returned before returning control to the caller.
shows the I/O address space.
BAR size dependent
0xFFFF FFFF
0x001F FFC0
0x001F FF80
0x0000 0000
0x0020 0000
Addr
not writable by user calls
not writable by user calls
Used by BFM routines
Used by BFM routines
Root Complex Shared
Configuration Scratch
Assigned Smallest to
Endpoint
or endpoint
or endpoint
BAR Table
Memory
Unused
Space
Largest
BARs
/O Space
PCI Express Compiler User Guide
15–33

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