IP-PCIE/1 Altera, IP-PCIE/1 Datasheet - Page 346

• Manufacturer Part Number: IP-PCIE/1
• Description: IP CORE - PCI Express X1 Lane
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IP-PCIE/1

• Software Application: IP CORE, Interface And Protocols, PCI
• Supported Families: Arria GX, Cyclone II, HardCopy II, Stratix II
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: PCI Express Compiler, x1 Link Width
• License: Initial License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

C–4
PCI Express Compiler User Guide
Arria GX Devices
Cyclone III Family
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Size and performance tables appear here for the following device families:
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■
■
■
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Table C–6
Arria GX (EP1AGX60CF780C6) devices for a maximum payload of 256 bytes with
different parameters, using the Quartus II software, version 10.1.
Table C–6. Performance and Resource Utilization, Avalon-MM Interface - Arria GX Devices
It may be difficult to achieve 125 MHz frequency in complex designs that target the
Arria GX device. Altera recommends the following strategies to achieve timing:
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■
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Table C–7
Cyclone III (EP3C80F780C6) devices for a maximum payload of 256 bytes with
different parameters, using the Quartus II software, version 10.1
.
Table C–7. Performance and Resource Utilization, Avalon-MM Interface - Cyclone III Family
Note to
(1) These numbers are preliminary.
(Note 1)
16 Tags
Arria GX Devices
Cyclone III Family
Stratix II GX Devices
Stratix III Family
Stratix IV Family
Use separate clock domains for the Avalon-MM and PCI Express modules
Set the Quartus II Analysis & Synthesis Settings Optimization Technique to
Speed
Add non-bursting pipeline bridges to the Avalon-MM master ports
Use Quartus II seed sweeping methodology
×1/ ×4
×1
×1/ ×4
×1
×4
Table
×1
(1)
shows the typical expected performance and resource utilization of
shows the typical expected performance and resource utilization of
C–6:
Parameters
Parameters
Clock (MHz)
Internal
Internal Clock
125
125
(MHz)
62.5
125
Channels
Virtual
1
1
Logic Elements
10300
10800
Combinational
ALUTs
6600
8200
Dedicated
Registers
Registers
4500
4800
Size
Logic
December 2010 Altera Corporation
5000
5900
Size
M512
Memory Blocks
Avalon-MM Interface
3
7
M9K Memory
Blocks
27
32
Chapter :
62 (35)
M4K
32