MC68HC908JK8CP Freescale Semiconductor, MC68HC908JK8CP Datasheet - Page 146

• Manufacturer Part Number: MC68HC908JK8CP
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC908JK8CP

• Cpu Family: HC08
• Device Core Size: 8b
• Frequency (max): 8MHz
• Interface Type: SCI
• Program Memory Type: Flash
• Program Memory Size: 8KB
• Total Internal Ram Size: 256Byte
• # I/os (max): 15
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 13-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Through Hole
• Pin Count: 20
• Package Type: PDIP
• Lead Free Status / Rohs Status: Not Compliant

Analog-to-Digital Converter (ADC)
10.3.1 ADC Port I/O Pins
PTB0–PTB7 and PTD0–PTD3 are general-purpose I/O pins that are shared with the ADC channels. The
channel select bits (ADC status and control register, $003C), define which ADC channel/port pin will be
used as the input signal. The ADC overrides the port I/O logic by forcing that pin as input to the ADC. The
remaining ADC channels/port pins are controlled by the port I/O logic and can be used as
general-purpose I/O. Writes to the port register or DDR will not have any affect on the port pin that is
selected by the ADC. Read of a port pin which is in use by the ADC will return a logic 0 if the corresponding
DDR bit is at logic 0. If the DDR bit is at logic 1, the value in the port data latch is read.
146
INTERNAL
DATA BUS
AIEN
INTERRUPT
LOGIC
READ DDRB/DDRD
WRITE DDRB/DDRD
WRITE PTB/PTD
READ PTB/PTD
COCO
BUS CLOCK
MC68HC908JL8/JK8 • MC68HC08JL8/JK8 • MC68HC908KL8 Data Sheet, Rev. 3.1
CONVERSION
COMPLETE
RESET
ADC DATA REGISTER
Figure 10-2. ADC Block Diagram
GENERATOR
ADIV[2:0]
CLOCK
ADC
ADC CLOCK
DDRBx/DDRDx
PTBx/PTDx
ADC VOLTAGE IN
ADCVIN
DISABLE
DISABLE
(1 OF 13 CHANNELS)
ADC0–ADC11
CHANNEL
SELECT
ADC CHANNEL x
ADCx
Freescale Semiconductor
ADC12
ADCH[4:0]